###########################################################################
		UP-CHT01
###########################################################################
---------------------------------------------------------------------------
Chipset:	Cherry Trail T3, DDR3L
---------------------------------------------------------------------------
Microcode:
	C0	M01406C335E
	D0	M01406C4406
---------------------------------------------------------------------------
About BIOS Update:
	This release includses IA32 BIOS (UEFI 32bit)
	Please read readme.txt carefully before update BIOS.
IMPORTANT:
	For EVT1, Version newer than UPC1AM0F only supports 2GB RAM.
	DO NOT falsely update this version to a board with 1GB RAM only.
	For EVT2,3,DVT BIOS released with _2GB or _4GB subfix
	    support only correspond RAM size.
	For DVT UPC1BM0M and newer version support both 2GB and 4GB RAM.
---------------------------------------------------------------------------
Note:
	1. For EVT1 -
	   UPC1AM00, UPC1AM01 cannot be updated to UPC1AM02 or newer one
	   directly. Please contact AE to get "UPC1AM02_FPT.zip"
           and then update BIOS with it.
	2. OS Image ID:
	   Windows & Linux
	   (1) (removed in UPC1AM0E) Disable USB OTG 
	   (2) Some Misc. requirement
	   Android
	   (1) Update to ACPI table specific for Android
	   (2) Disable MSCustomSdbusDriver
	   (3) Install Pupdr to ACPI table
	3. Advanced password : upassw0rd

Known issue:
	1. When I2C0/GPIO set to I2C0,
	unexpected key stroke will continuos occure in POST/UEFI environment.

###########################################################################
===========================================================================
BIOS Revision:		V018BM12                     (Base on:V018BM11)
Build Date:		06/13/2016,06/14/2016
Checksum:		V018BM12	  CC3Fh
Checksum:		V018BM12_IA32	  51B4h
Sign-on Message:
		UP-CHT01 R1.2 (V018BM12) (06/13/2016)
		UP-CHT01 IA32 R1.2 (V018BM12) (06/14/2016)

Action:         (Fixed)Can't install Windows 10, it always into recovery mode.
===========================================================================
BIOS Revision:		V018BM11                     (Base on:V018BM10 + UPC1BM0S)
Build Date:		06/07/2016
Checksum:		V018BM11	  E961h
Checksum:		V018BM11_IA32	  0DD7h
Sign-on Message:
		UP-CHT01 R1.1 (V018BM11) (06/07/2016)
		UP-CHT01 IA32 R1.1 (V018BM11) (06/07/2016)
===========================================================================
BIOS Revision:		UPC1BM0S
Build Date:		06/04/2016
Checksum:		UPC1BM0S	99EBh
Checksum:		UPC1BM0S_IA32	B842h
Sign-on Message:
		UP-CHT01 R0.S (UPC1BM0S) (06/04/2016)
		UP-CHT01 IA32 R0.S (UPC1BM0S) (06/04/2016)

Changes:	
                Support AAEON Security.

===========================================================================
BIOS Revision:		V018BM10                     (Base on:UPC1BM0R)
Build Date:		05/31/2016
Checksum:		V018BM10	  32F5h
Checksum:		V018BM10_IA32	  C91Dh
Sign-on Message:
		UP-CHT01 R1.0 (V018BM10) (05/31/2016)
		UP-CHT01 IA32 R1.0 (V018BM10) (05/31/2016)

Action:		Build for 1G memory board used.
===========================================================================
BIOS Revision:		UPC1BM0R
Build Date:		05/24/2016
Checksum:		UPC1BM0R	981Eh
Checksum:		UPC1BM0R_IA32	8C71h
Sign-on Message:
		UP-CHT01 R0.R (UPC1BM0R) (05/24/2016)
		UP-CHT01 IA32 R0.R (UPC1BM0R) (05/24/2016)
Changes:
        1. Support I2C ADC device. Requested by customer.

===========================================================================
BIOS Revision:		UPC1BM0Q
Build Date:		05/20/2016
Checksum:		UPC1BM0Q	419Bh
Sign-on Message:
		UP-CHT01 R0.Q (UPC1BM0Q) (05/20/2016)

Changes:
        1. Modify setup menu - Enable console redirection as default
        2. Modify for advanced mode -
           (1) Remove symbol char in password because it's not on some non-US keyboard.
           (2) Remove password check for F7 pop-up menu.

===========================================================================
BIOS Revision:		UPC1BM0P
Build Date:		05/05/2016
Checksum:		UPC1BM0P	FE61h
Checksum:		UPC1BM0P_IA32	9D3Fh
Sign-on Message:
		UP-CHT01 R0.P (UPC1BM0P) (05/05/2016)
		UP-CHT01 IA32 R0.P (UPC1BM0P) (05/05/2016)
Changes:
	1. Support ZR300 camera. Requested for Intel RealSense.
	2. Support enabling/disabling ZR300 support in BIOS setup, default disabled.
		When enabled, following devices will appears -
		INT35AA - OV7251
		INT35BB - TANSTAMP
		INT35CC - BMG160
		INT35DD - BMA2X2
	3. Support advanced mode. BIOS setup will now prompt password -
		With no password entered, user can still access setup as normal mode.
		With advanced password entered, user is granted access to CRB setup items.
	4. Modify HAT configuration during POST.
		1. Set CPLD_OE default low.
		2. Hide "GPIO Configuration In Pin Order" menu
	5. Modify setup menu - 
		1. Remove console rediection item for HS UART because it requires CPLD programming.
		2. Remove 'Auto' item in DRD mode item because it is only for test.
		3. Show "IGD Turbo Mode" item
		4. Show "GFX Boost" item
	6. Modify setup default according to Intel's performance fine-tune.
		1. "IGD Turbo Mode" from "Auto" to "Enabled"
		2. "GFX Boost" from "Disabled" to "Enabled"
		3. "DVMT Pre-Allocated" from "32M" to "512M"
		4. "DVMT Total Gfx Mem" from "256MB" to "Max"
		5. "Aperture Size" from "256MB" to "512MB"
		6. "CPU Turbo Mode" from "Disabled" to "Enabled"
		7. "Max CPU C-state" from "C7" to "C1"
	7. Fix UART0 Rx malfunction.
	   Root Cause:	CRB BIOS hardcode GPIO N62&N67 as UART0, conflict with UP design (SE46&SE48)
		Fix by remove this hardcode.
	8. Remove undesired SCI routing.
	   Root Cause:	Bad coding in CRB BIOS.

===========================================================================
BIOS Revision:		UPC1BM0N
Build Date:		04/24/2016
Checksum:		UPC1BM0N	A58Fh
Checksum:		UPC1BM0N_IA32	207Ah
Sign-on Message:
		UP-CHT01 R0.N (UPC1BM0N) (04/24/2016)
		UP-CHT01 IA32 R0.N (UPC1BM0N) (04/24/2016)
Changes:
	1. Fix some USB ports does not work with UPC1BM0M.
	   Root Cause:	Bad coding. USB HSIC root is disabled in accident.

===========================================================================
BIOS Revision:		UPC1BM0M
Build Date:		04/20/2016
Checksum:		UPC1BM0M	E139h
Checksum:		UPC1BM0M_IA32	C1A7h
Sign-on Message:
		UP-CHT01 R0.M (UPC1BM0M) (04/20/2016)
		UP-CHT01 IA32 R0.M (UPC1BM0M) (04/20/2016)
Changes:
	1. Support both 2GB and 4GB RAM sku.
	2. Modify setup, show following items and set their default to 'Disabled' -
		(1) CPU Turbo Mode
		(2) DPTF
	3. DVT(EVT4) GPIO programming -
		(1) Add "I2S/GPIO" control to HAT configuration.
		(2) Add pin 12, 35, 36, 37, 38, 40 control to HAT configuration.

===========================================================================
BIOS Revision:		UPC1BM0L
Build Date:		04/15/2016
Checksum:		UPC1BM0L_2GB		39EFh
Checksum:		UPC1BM0L_IA32_2GB	CFEEh
Checksum:		UPC1BM0L_4GB		CF2Ah
Sign-on Message:
		UP-CHT01 R0.L (UPC1BM0L) (04/15/2016)
		UP-CHT01 IA32 R0.L (UPC1BM0L) (04/15/2016)
Changes:
	1. Modify USB OTG default from "ACPI" to "PCI" for it to be functional in customer's linux.
	2. Fix USB3.0 malfunction.
	   Root Cause:	USB OC[0] is removed in EVT3. Setting it as GPIO will make it malfunction.
	3. Fix power button no action in OS.
	   Root cause:	Power button is work and defined as GPIO on CRB. Fix by setting it as native function.

===========================================================================
BIOS Revision:		UPC1BM0K
Build Date:		04/09/2016
Checksum:		UPC1BM0K_2GB		A1D1h
Checksum:		UPC1BM0K_IA32_2GB	6412h
Checksum:		UPC1BM0K_4GB		48AFh
Sign-on Message:
		UP-CHT01 R0.K (UPC1BM0K) (04/09/2016)
		UP-CHT01 IA32 R0.K (UPC1BM0K) (04/09/2016)
Changes:
	1. Modify SMBIOS board version -
		DVT(EVT4) - V0.4
	2. Support DVT 4GB sku.
	3. Support eDP.
	4. DVT(EVT4) GPIO programming - 
		(1) Set all GPIO, which are connected to CPLD for unknown usage, as GPI
		(2) Remove "I2S/GPIO" control on HAT
		(3) Remove pin 12, 35, 36, 37, 38, 40 control from HAT configuration.

===========================================================================
BIOS Revision:		UPC1BM0I
Build Date:		03/29/2016
Checksum:		UPC1BM0I_2GB 4AAFh
Checksum:		UPC1BM0I_2GB_IA32 C715h
Checksum:		UPC1BM0I_4GB 49D7h
Sign-on Message:
		UP-CHT01 R0.I (UPC1BM0I) (03/29/2016)
		UP-CHT01 IA32 R0.I (UPC1BM0I) (03/29/2016)
Changes:
	1. Modify BIOS setup -
		(1) Default disable HSIC and SSIC ports that are not used.
		(2) Disable and hide engineering mode.
	2. Modify SMBIOS board version for customer's requirement. -
		EVT1 - V0.1
		EVT2 - V0.2
		EVT3 - V0.3
		EVT4 - V0.4
	3. Modify HAT for EVT3 specification change -
		SDIO GPIO programming.
		Show SDIO item and hide SD card item
		Set UART2 default disabled and hidden
		Set SPI2 CS1 default as GPO, high, and make it selectable even when SPI2 is enabled.
	4. Fix I2C1(I2C#2) malfunction
	   Root Cause:	Bad coding when changing GPIO mapping.

===========================================================================
BIOS Revision:		UPC1BM0G
Build Date:		02/25/2016
Checksum:		UPC1BM0F_2G C395h
Checksum:		UPC1BM0F_4G CFADh
Sign-on Message:
		UP-CHT01 R0.G (UPC1BM0G) (02/25/2016)
Changes:
	1. Build for EVT3 2GB/4GB board.
	2. Change setup item default value.
	  (1) Enable all SSIC and HSIC in BIOS
	  (2) Disable DPTF
	  (3) Enable CPU Turbo


===========================================================================
BIOS Revision:		UPC1BM0F
Build Date:		02/19/2016
Checksum:		UPC1BM0F_2G E168h
Checksum:		UPC1BM0F_4G 4C3Ch
Sign-on Message:
		UP-CHT01 R0.F (UPC1BM0F) (02/19/2016)
Changes:
	1. Build for EVT3 2GB/4GB board.

===========================================================================
BIOS Revision:		UPC1AM0F
Build Date:		02/06/2016
Checksum:		UPC1AM0F	8357h
Checksum:		UPC1AM0F_IA32	7277h
Sign-on Message:
		UP-CHT01 R0.F (UPC1AM0F) (02/06/2016)
		UP-CHT01 IA32 R0.F (UPC1AM0F)(02/06/2016)
Changes:
	1. Build for EVT2 2GB board.

===========================================================================
BIOS Revision:		UPC1AM0E
Build Date:		02/03/2016
Checksum:		UPC1AM0E	6AE1h
Checksum:		UPC1AM0E_IA32	DEF8h
Sign-on Message:
		UP-CHT01 R0.E (UPC1AM0E) (02/03/2016)
		UP-CHT01 IA32 R0.E (UPC1AM0E)(02/03/2016)
Changes:
	1. Support OTG -
		(1) Remove CRB garbage code about OTG feature.
		(2) Show USB mode selection items
		    Also Add a "Auto" item for validating USB_ID signal.
		(3) Show "USB OTG Support" and set default from "AUTO" to "ACPI",
		    otherwise OTG will be disabled in Windows/Linux.
	2. Fine-tune for MIPI interface.

===========================================================================
BIOS Revision:		UPC1AM0D
Build Date:		01/25/2016
Checksum:		UPC1AM0D	0F89h
Checksum:		UPC1AM0D_IA32	BE3Eh
Sign-on Message:
		UP-CHT01 R0.D (UPC1AM0D) (01/25/2016)
		UP-CHT01 IA32 R0.D (UPC1AM0D)(01/25/2016)
Changes:
	1. Correct COM1(UART0) default.
	2. Correct I2C speed for I2C2.
	   Root Cause:	Coding mistake.

Known issue:	COM1 can send data but cannot recieve data.

===========================================================================
BIOS Revision:		UPC1AM0C
Build Date:		01/22/2016
Checksum:		UPC1AM0C	28BDh
			UPC1AM0C IA32	931Dh
Sign-on Message:
		UP-CHT01 R0.C (UPC1AM0C) (01/22/2016)
		UP-CHT01 IA32 R0.C (UPC1AM0C)(01/22/2016)
Changes:
	1. Correct I2C speed.
	   Root Cause:	Coding mistake.
	2. Show COM1(UART0) for validation COM port interface on CN7.

===========================================================================
BIOS Revision:		UPC1AM0B
Build Date:		01/19/2016
Checksum:		2E53h
Sign-on Message:
		UP-CHT01 R0.B (UPC1AM0B) (01/19/2016)
Changes:
	1. Fix windows installation fail. Windows shows BSOD when finishing installation. (after file copy)
	   This does not observed for a windows which was already been installed with older BIOS.
	   Root Cause:	I2C library was configured as 100KHz in BIOS R0.A. This may cause 
		onboard I2C slave devices to be falsely configured (PMIC for example)

===========================================================================
BIOS Revision:		UPC1AM0A
Build Date:		01/15/2016
Checksum:		1D5Ah
Sign-on Message:
		UP-CHT01 R0.A (UPC1AM0A) (01/15/2016)
Changes:
	1. Support selecting I2C speed in BIOS.
	2. Update CPU microcode.
	3. Support EVT2(H/W A0.2) new HAT design -
	   (1) GPIO programming for H/W A0.2,
	   (2) Support controlling PCA9555
	Note:	All Native/GPIO items are replaced with LPSS items to simplify HAT 
	   control, besides I2C0/GPIO item and I2S/GPIO item.

Known Issue:
	When I2C0/GPIO set to I2C0,
	unexpected key stroke will continuos occure in POST/UEFI environment.

===========================================================================
BIOS Revision:		UPC1AM09
Build Date:		01/11/2016
Checksum:		781Bh
Sign-on Message:
		UP-CHT01 R0.9 (UPC1AM09) (01/11/2016)
Changes:
	1. Modiy "Version" data in SMBIOS Type 2.
	   For SW App. to differentiate board version.
		EVT1 - V0.1
	2. Fix system does not boot if disabling I2C#2 in BIOS setup.
	   Root Cause:	Removing garbage code which is for CRB.

===========================================================================
BIOS Revision:		UPC1AM08
Build Date:		12/24/2015
Checksum:		EB92h
Sign-on Message:
		UP-CHT01 R0.8 (UPC1AM08) (12/24/2015)
Changes:
	1. Modify ACPI ID for PWM2, to be same as PWM1
	2. Change logo with file provided by customer.
	3. Support MIPI during POST.

===========================================================================
BIOS Revision:		UPC1AM07
Build Date:		12/17/2015
Checksum:		E1E4h
Sign-on Message:
		UP-CHT01 R0.7 (UPC1AM07) (12/17/2015)
Changes:
	1. Support Auto-load-default when RTC battery is detected as low.
	2. Support MIPI panel. Add a item for selecting panel type.
	3. Add /L in go_64.nsh, for updating LOGO correctly.

===========================================================================
BIOS Revision:		UPC1AM06
Build Date:		12/04/2015
Checksum:		37FCh
Sign-on Message:
		UP-CHT01 R0.6 (UPC1AM06) (12/04/2015)
Changes:
	1. Remove garbadge codes which are for CRB design.
		(1) Do not override DMI board name according to BOARD ID
		(2) Remove garbage ASL code, especially related to GPIO.
		(3) Remove OTG2 ASL device which take GPIO_N3 as USB_ID
	2. Change logo with file provided by customer.
	3. Correct GPIO porting for HAT SPI, UART1, UART2
	4. Force enable PWM and HDA devices for validation.

===========================================================================
BIOS Revision:		UPC1AM05
Build Date:		11/26/2015
Checksum:		DEF2h
Sign-on Message:
		UP-CHT01 R0.5 (UPC1AM05) (11/26/2015)
Changes:
	1. Modify setup default -
		(1) Default disable LPC COM1(PCU UART0) because it's not designed on UP.
		(2) Default enable PWM0, PWM1
	2. Support PWM0, PWM1 in Windows. Remove dependency to OS Image ID.
	3. Remove garbadge codes which are for CRB design.
		(1) Fix HAT pin15 GPIO control.

===========================================================================
BIOS Revision:		UPC1AM04
Build Date:		11/24/2015
Checksum:		9A0Eh
Sign-on Message:
		UP-CHT01 R0.4 (UPC1AM04) (11/24/2015)
Changes:
	1. Support HAT input mode
	2. Modify setup - Add "OS IMAGE ID" item in Boot page
	   Refer to Note#2 for detail.
	3. Patch for system no boot when set I2C1 as GPIO. This happens only in R0.3.
	   Reason: When setting LPSS I2C #2 Support 'Disabled',
		   system will not boot for unknown reason.
	4. Seperating HAT configuration items from "LPSS" items to ease debug
	5. Remove garbage devices in device manager.
	6. Remove garbadge codes which are for CRB design.
		(1) Fix HAT pin7, pin18, pin29 GPIO control.
		(2) Does not need additional power button event for boot.
		Root cause: BIOS shuts system For Win8 Charging spec(considering battery insertion).
		But it is not necessary for UP-CH01.
Known issue:
	1. HAT Pin15 is remained low, investigating.

===========================================================================
BIOS Revision:		UPC1AM03
Build Date:		11/17/2015
Checksum:		5F98h
Sign-on Message:
		UP-CHT01 R0.3 (UPC1AM03) (11/17/2015)
---------------------------------------------------------------------------
BIOS Revision:		UPC1AM03_IA32
Build Date:		11/17/2015
Checksum:		51E0h
Sign-on Message:
		UP-CHT01 IA32 R0.3 (UPC1AM03) (11/17/2015)
---------------------------------------------------------------------------
Changes:
	1. Modify setup menu - Re-arrange whole setup menu
	2. Remove garbage devices in device manager.
	3. Remove POST debug message.
	4. Fix no graphics device found in windows.
	   This causes low 3D performance.

===========================================================================
BIOS Revision:		UPC1AM02
Build Date:		11/12/2015
Checksum:		5C76h
Sign-on Message:
		UP-CHT01 R0.2 (UPC1AM02) (11/12/2015)
---------------------------------------------------------------------------
BIOS Revision:		UPC1AM02_IA32
Build Date:		11/12/2015
Checksum:		AE40h
Sign-on Message:
		UP-CHT01 IA32 R0.2 (UPC1AM02) (11/12/2015)
---------------------------------------------------------------------------
Changes:
	1. Modify SPI "Fast Read" speed from 20MHz to 50MHz
	2. Modify setup - PCIe S0ix : "Enabled" to "Disabled"
	3. Modify VBIOS(GOP) for UP-CHT01
		(1) Default disable eDP
		(2) Add MIPI en/disable item, default disabled.
		    (But MIPI still underworking)
	4. Support selecting GPIO mutiple function in setup menu.

===========================================================================
BIOS Revision:		UPC1AM01 (UPC1AM01_TEMP3)
Build Date:		11/07/2015
Sign-on Message:
		N/A
Changes:
	1. GPIO Programming.

===========================================================================
BIOS Revision:		UPC1AM00	(Based on CRB 1ARXP050_T3)
Build Date:		11/02/2015
Checksum:		2002h
Sign-on Message:
		N/A
Changes:
	1. For bring-up.

===========================================================================