################################################################################
                            UP-CHT01
################################################################################
Microcode:
        M01406C3368.PDB
        M01406C4411.PDB
--------------------------------------------------------------------------------
Chipset:        Cherry Trail T3, DDR3L
--------------------------------------------------------------------------------
(*) Onboard Memory Configuration :
        Only Support Onboard 2GB and 4GB memory.

        (*) Note :
        1. SMBIOS(DMI) Information will be Removed after flash BIOS to [UPC1DM11] or above versions
        2. BIOS Setup Administrator Password : upassw0rd
        3. Compatible DmiEdit Version : 5.18

        (*) Know issue : 
        For UPC1DM17 and later version, system has capability to enter S3,  but S3 is not supported on Intel Cherry Trail Platform.
################################################################################
================================================================================
BIOS Name:      UPC1DM27                (Based on : UPC1DM26)
Build Date:     06/19/2023
Checksum:       D1ECh
Sign-on Message:
        UP-CHT01 R2.7 (UPC1DM27)(06/19/2023)
Changes:
        Issue Patch: Patch system will power on twice when the system temperature is low

================================================================================
BIOS Name:      UPC1DM26                (Based on : UPC1DM25)
Build Date:     03/31/2023
Checksum:       50A3h
Sign-on Message:
        UP-CHT01 R2.6 (UPC1DM26)(03/31/2023)
Changes:
        1. Support Secure Boot

================================================================================
===========================================================================
BIOS Name:      UPC1DM25                (based on UPC1DM24)
Checksum:       8MB:8476h
Sign-on Message:
                UP-CHT01 R2.5 (UPC1DM25)(06/25/2021)

Change:
        1. Enable IGD turbo as default
        2. Watchdog time default set to 300s
===========================================================================
BIOS Name:      UPC1DM24                (based on UPC1DM23)
Checksum:       8MB:AF05h
Sign-on Message:
                UP-CHT01 R2.4 (UPC1DM24)(06/01/2021)

Change:
        1. Support New Kingston SPD: B5116ECMDXGJD
        2. Modify Micron Memory information for MT41K512M16
===========================================================================
BIOS Name:      UPC1DM23                (based on UPC1DM22)
Checksum:       8MB:4D1Eh
Sign-on Message:
                UP-CHT01 R2.3 (UPC1DM23)(08/17/2020)

Change:
        1. Spec Change: Support Fixed Boot Order: 
          1st USB Device
          2nd Hard Disk(eMMC) 
          3rd Network
          4th CD/DVD
        2. Support direction control for HAT PIN 12/35 in I2S mode
        3. Patch SMBIOS corruption start at Type 17
===========================================================================
===========================================================================
BIOS Name:      UPC1DM22                (based on UPC1DM21)
Checksum:       8MB:312Bh
Sign-on Message:
                UP-CHT01 R2.2 (UPC1DM22)(05/08/2020)

Change:
        1. Fixed System will not boot to BIOS menu when boot device was disabled
        2. Patch System will Hang when Boot into Linux(Graphics)
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM21]              (based on [UPC1DM20])
Checksum:       [8]MB:[3916]h
Sign-on Message:
                UP-CHT01 R2.1 (UPC1DM21)(11/12/2019)

Change:
        Fixed : SMBIOS Information Mismatch
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM20]              (based on [UPC1DM19])
Checksum:       [8]MB:[5E7F]h
Sign-on Message:
                UP-CHT01 R2.0 (UPC1DM20)(11/07/2019)

Change:
        Fixed : Memory SPD Parameters Wrong for MICRON.MT41K512M16HA-125:A
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM19]              (based on [UPC1DM18])
Checksum:       [8]MB:[3A5C]h
Sign-on Message:
                UP-CHT01 R1.9 (UPC1DM19)(11/06/2019)

Change:
        Spec. Changed : Support Micron SPD ; MT41K512M16VRN-107 IT:P & MICRON.MT41K512M16HA-125:A
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM18]              (based on [UPC1DM17])
Checksum:       [8]MB:[9A05]h
Sign-on Message:
                UP-CHT01 R1.8 (UPC1DM18)(07/31/2019)

Change:
        1. Spec. Changed : Supported New Micron SPD ; MT41K512M16VRN-107 IT:P
        2. Fixed : Intel SA-00233 / Upgrade CPU Microcode
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM17]              (based on [UPC1DM16])
Checksum:       [8]MB:[62D4]h
Sign-on Message:
                UP-CHT01 R1.7 (UPC1DM17)(02/20/2019)
 Change:
        1. Patch System will get into sleep when run burn-in test.
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM16]              (based on [UPC1DM15])
Checksum:       [8]MB:[65CB]h
Sign-on Message:
                UP-CHT01 R1.6 (UPC1DM16)(12/13/2018)

Change:         
        1. Pull up 1K for DDC2 (I2C4_SOC_SDA and I2C4_SOC_SCL)
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM15]              (based on [UPC1DM14])
Checksum:       [8]MB:[6EE1]h
Sign-on Message:
                UP-CHT01 R1.5 (UPC1DM15)(11/9/2018)

Change:         
        1. Fixed : Sometimes, the time to reset system by watchdog is longer 
        than the time we set in BIOS setup "Timer in Second".
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM14]              (based on [UPC1DM13])
Checksum:       [8]MB:[4856]h
Sign-on Message:
                UP-CHT01 R1.4 (UPC1DM14)(10/30/2018)

Change:         
        1. Changed the default value of watchdog timer
                a. Minimum Value: 60 -> 15 seconds
                b. Maximum Value: 600 -> 120 seconds
                c. Default Value: 60 -> 30 seconds
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM13]              (based on [UPC1DM12])
Checksum:       [8]MB:[2E84]h
Sign-on Message:
                UP-CHT01 R1.3 (UPC1DM13)(10/19/2018)

Change:         
        Remove "Low Power S0 Idle Capable Flag" in FADT Table
        Fixed : AMI TSE Kernel Issue - "Quiet Boot" will not be Reload to Default when "TSE_DONOT_LOAD_PASSWORD_ON_DEFAULTS" = 1
        Per PM request to implement Watchdog function and setup items under Advanced page
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM12]              (based on [UPC1DM11])
Checksum:       [8]MB:[64D4]h
Sign-on Message:
                UP-CHT01 R1.2 (UPC1DM12)(06/11/2018)

Change:         
        Fixed : System Hang Up when user use Console Redirection and no HDMI
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM11]              (based on [UPC1DM10])
Checksum:       [8]MB:[B7A6]h
Sign-on Message:
                UP-CHT01 R1.1 (UPC1DM11)(02/23/2018)

Change:         
        Hide Unknown Win10 IoT Core Devices in Windows Device Management
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM10]              (based on [UPC1DM09])
Checksum:       [8]MB:[26DC]h
Sign-on Message:
                UP-CHT01 R1.0 (UPC1DM10)(02/22/2018)

Change:         
        Fixed : HAT Pin 24 GPIO Control Failed (through BIOS Setup Option)
        Fixed : HAT Pin 7 GPIO Control Failed (through BIOS Setup Option)
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM09]              (based on [UPC1DM08])
Checksum:       [8]MB:[8067]h
Sign-on Message:
                UP-CHT01 R0.9 (UPC1DM09)(02/07/2018)

Change:         
        Add support new 4G onboard memory material.
        Turn off LED 0/1/2 as default by setup option LED2/LED3/LED4.
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM08]              (based on [UPC1DM07])
Checksum:       [8]MB:[F82B]h
Sign-on Message:
                UP-CHT01 R0.8 (UPC1DM08)(01/26/2018)

Change:         
        Support Windows 10 IoT Core
        Adjusted : Setup Menu Hotkey F4 Redirect to Save & Reset
        Fixed : System Boot into CRB Setup Menu through OS Indication
        PM Request : CPU Power Limit #1 Limit to 9W
        For Intel Security Advisory : Update CPU Microcode (M01406C3_367 / M01406C4_410)
        Support : SMBIOS(DMI) Preserve Solution on Cherry Trail Platform
        Finetune : For H/W Changed - Realtek Audio HAT Board
        Fixed : There's a yellow bang of LPSS PWM0 under Windows
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM07]              (based on [UPC1DM06])
Checksum:       [8]MB:[A1E5]h
Sign-on Message:
                UP-CHT01 R0.7 (UPC1DM07)(08/30/2017)

Change:         
        Fixed : There're abnormal keyboard enter command when I2C0 as enable under uEFI shell
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM06]              (based on [UPC1DM05])
Checksum:       [8]MB:[0EC1]h
Sign-on Message:
                UP-CHT01 R0.6 (UPC1DM06)(08/28/2017)

Change:         
        Fixed : SMBIOS Data will lost after CMOS Failed
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM05]              (based on [UPC1DM04])
Checksum:       [8]MB:[1E96]h
Sign-on Message:
                UP-CHT01 R0.5 (UPC1DM05)(08/25/2017)

Change:         
        Workaround : DmiEdit(Windows/uEFI) will Hang Up when Update SMBIOS Data
        Fixed : Unnecessary Battery Icon under Windows
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM04]              (based on [UPC1DM03])
Checksum:       [8]MB:[6C9D]h
Sign-on Message:
                UP-CHT01 R0.4 (UPC1DM04)(08/16/2017)

Change:         
        Fixed : Custom SMBIOS Information Loss after CMOS Fail
        Fixed : Default Password Loss after Restore Default

Note:
1> Please updated the BIOS to UPC1DM03 first if the BIOS version on board is earlier than UPC1DM02
2> After <1> , than the BIOS could be updated to UPC1DM04
===========================================================================

===========================================================================
BIOS Name:      [UPC1DM03]              (based on [UPC1DM02])
Checksum:       [8]MB:[3A36]h
Sign-on Message:
                UP-CHT01 R0.3 (UPC1DM03)(05/09/2017)
Change:         
        Bug Fixed : Aaeon Magic Word Disappeared
        Bug Fixed : No need to password to enter Setup Menu with Administrator Level from BBS Popup Menu
        Bug Fixed : BIOS Administrator Password can not be override
===========================================================================
===========================================================================
BIOS Name:      [UPC1DM02]              (based on [UPC1DM01])
Checksum:       [8]MB:[05DC]h
Sign-on Message:
                UP-CHT01 R0.2 (UPC1DM02)(04/26/2017)

Change:         
        Important - Upgrade BIOS Core Base
===========================================================================

===========================================================================
                BIOS Core Base Changed
===========================================================================

===========================================================================
BIOS Name:      [UPC1BM10]              (based on [UPC1BM0Z])
Checksum:       [8]MB:[05B9]h
Sign-on Message:
                UP-CHT01 R1.0 (UPC1BM10)(03/16/2017)

Change:         
        Fixed??????I2C1 SCL/SDA Direction are abnormal in CPLD
===========================================================================

===========================================================================
BIOS Name:      [UPC1BM0Z]              (based on [UPC1BM0Y])
Checksum:       [8]MB:[CA5B]h
                [4]MB:[2888]h
Sign-on Message:
                UP-CHT01 R0.Z (UPC1BM0Z)(03/14/2017)

Change:         
        Support Case Sensitive BIOS Setup Password
        Bug fixed: CPLD initial process
===========================================================================

===========================================================================
BIOS Name:      [UPC1BM0Y]              (based on [UPC1BM0X])
Checksum:       [8]MB:[B816]h
Sign-on Message:
                UP-CHT01 R0.Y (UPC1BM0Y)(03/07/2017)

Change:         
        Customer Request: Implement CPLD initial process
===========================================================================

===========================================================================
BIOS Revision:          UPC1BM0X
Build Date:             09/10/2016
Checksum:               UPC1BM0X        33A2h
Checksum:               UPC1BM0X_IA32   4F86h
Sign-on Message:
                UP-CHT01 R0.X (UPC1BM0X) (09/10/2016)
                UP-CHT01 IA32 R0.X (UPC1BM0X) (09/10/2016)


Changes:        PXE boot option in the standard menu.
===========================================================================
BIOS Revision:          UPC1BM0W
Build Date:             09/08/2016
Checksum:               UPC1BM0W        CCAAh
Checksum:               UPC1BM0W_IA32   FEC2h
Sign-on Message:
                UP-CHT01 R0.W (UPC1BM0W) (09/08/2016)
                UP-CHT01 IA32 R0.W (UPC1BM0W) (09/08/2016)


Changes:        Disable EdkShellBinPkg, avoid FLASH Size changed.

===========================================================================
BIOS Revision:          UPC1BM0V
Build Date:             08/18/2016
Checksum:               UPC1BM0V        48F9h
Checksum:               UPC1BM0V_IA32   33C4h
Sign-on Message:
                UP-CHT01 R0.V (UPC1BM0V) (08/18/2016)
                UP-CHT01 IA32 R0.V (UPC1BM0V) (08/18/2016)

Changes:        
                Support UEFI LAN BOOT.

Test Step:
1. Use Admin account, In BIOS CRB Setup->CRB Advance->Network Stack Configuration, 
   Network Stack default is Disabled, when set to Enabled, IPv4/IPv6 will show up and default is Enabled.
2. After save and Reset, you will see UEFI IPv4/IPv6 boot in BIOS Boot menu.
3. If you connect to network, boot from IPv4/IPv6 it will show "Checking Media Presence..." message....

===========================================================================
BIOS Revision:          UPC1BM0U
Build Date:             08/13/2016
Checksum:               UPC1BM0U        94D7h
Checksum:               UPC1BM0U_IA32   D768h
Sign-on Message:
                UP-CHT01 R0.U (UPC1BM0U) (08/13/2016)
                UP-CHT01 IA32 R0.U (UPC1BM0U) (08/13/2016)

Changes:        
                Support MIPI-DSI panel with Intel MIPI Sequence Tool V2.0, instead of V3.0.
                Linux kenel currently supports only V2.0.

===========================================================================
BIOS Revision:          UPC1BM0S
Build Date:             06/04/2016
Checksum:               UPC1BM0S        99EBh
Checksum:               UPC1BM0S_IA32   B842h
Sign-on Message:
                UP-CHT01 R0.S (UPC1BM0S) (06/04/2016)
                UP-CHT01 IA32 R0.S (UPC1BM0S) (06/04/2016)

Changes:        
                Support AAEON Security.

===========================================================================
BIOS Revision:          UPC1BM0R
Build Date:             05/24/2016
Checksum:               UPC1BM0R        981Eh
Checksum:               UPC1BM0R_IA32   8C71h
Sign-on Message:
                UP-CHT01 R0.R (UPC1BM0R) (05/24/2016)
                UP-CHT01 IA32 R0.R (UPC1BM0R) (05/24/2016)
Changes:
        1. Support I2C ADC device. Requested by customer.

===========================================================================
BIOS Revision:          UPC1BM0Q
Build Date:             05/20/2016
Checksum:               UPC1BM0Q        419Bh
Sign-on Message:
                UP-CHT01 R0.Q (UPC1BM0Q) (05/20/2016)

Changes:
        1. Modify setup menu - Enable console redirection as default
        2. Modify for advanced mode -
           (1) Remove symbol char in password because it's not on some non-US keyboard.
           (2) Remove password check for F7 pop-up menu.

===========================================================================
BIOS Revision:          UPC1BM0P
Build Date:             05/05/2016
Checksum:               UPC1BM0P        FE61h
Checksum:               UPC1BM0P_IA32   9D3Fh
Sign-on Message:
                UP-CHT01 R0.P (UPC1BM0P) (05/05/2016)
                UP-CHT01 IA32 R0.P (UPC1BM0P) (05/05/2016)
Changes:
        1. Support ZR300 camera. Requested for Intel RealSense.
        2. Support enabling/disabling ZR300 support in BIOS setup, default disabled.
                When enabled, following devices will appears -
                INT35AA - OV7251
                INT35BB - TANSTAMP
                INT35CC - BMG160
                INT35DD - BMA2X2
        3. Support advanced mode. BIOS setup will now prompt password -
                With no password entered, user can still access setup as normal mode.
                With advanced password entered, user is granted access to CRB setup items.
        4. Modify HAT configuration during POST.
                1. Set CPLD_OE default low.
                2. Hide "GPIO Configuration In Pin Order" menu
        5. Modify setup menu - 
                1. Remove console rediection item for HS UART because it requires CPLD programming.
                2. Remove 'Auto' item in DRD mode item because it is only for test.
                3. Show "IGD Turbo Mode" item
                4. Show "GFX Boost" item
        6. Modify setup default according to Intel's performance fine-tune.
                1. "IGD Turbo Mode" from "Auto" to "Enabled"
                2. "GFX Boost" from "Disabled" to "Enabled"
                3. "DVMT Pre-Allocated" from "32M" to "512M"
                4. "DVMT Total Gfx Mem" from "256MB" to "Max"
                5. "Aperture Size" from "256MB" to "512MB"
                6. "CPU Turbo Mode" from "Disabled" to "Enabled"
                7. "Max CPU C-state" from "C7" to "C1"
        7. Fix UART0 Rx malfunction.
           Root Cause:  CRB BIOS hardcode GPIO N62&N67 as UART0, conflict with UP design (SE46&SE48)
                Fix by remove this hardcode.
        8. Remove undesired SCI routing.
           Root Cause:  Bad coding in CRB BIOS.

===========================================================================
BIOS Revision:          UPC1BM0N
Build Date:             04/24/2016
Checksum:               UPC1BM0N        A58Fh
Checksum:               UPC1BM0N_IA32   207Ah
Sign-on Message:
                UP-CHT01 R0.N (UPC1BM0N) (04/24/2016)
                UP-CHT01 IA32 R0.N (UPC1BM0N) (04/24/2016)
Changes:
        1. Fix some USB ports does not work with UPC1BM0M.
           Root Cause:  Bad coding. USB HSIC root is disabled in accident.

===========================================================================
BIOS Revision:          UPC1BM0M
Build Date:             04/20/2016
Checksum:               UPC1BM0M        E139h
Checksum:               UPC1BM0M_IA32   C1A7h
Sign-on Message:
                UP-CHT01 R0.M (UPC1BM0M) (04/20/2016)
                UP-CHT01 IA32 R0.M (UPC1BM0M) (04/20/2016)
Changes:
        1. Support both 2GB and 4GB RAM sku.
        2. Modify setup, show following items and set their default to 'Disabled' -
                (1) CPU Turbo Mode
                (2) DPTF
        3. DVT(EVT4) GPIO programming -
                (1) Add "I2S/GPIO" control to HAT configuration.
                (2) Add pin 12, 35, 36, 37, 38, 40 control to HAT configuration.

===========================================================================
BIOS Revision:          UPC1BM0L
Build Date:             04/15/2016
Checksum:               UPC1BM0L_2GB            39EFh
Checksum:               UPC1BM0L_IA32_2GB       CFEEh
Checksum:               UPC1BM0L_4GB            CF2Ah
Sign-on Message:
                UP-CHT01 R0.L (UPC1BM0L) (04/15/2016)
                UP-CHT01 IA32 R0.L (UPC1BM0L) (04/15/2016)
Changes:
        1. Modify USB OTG default from "ACPI" to "PCI" for it to be functional in customer's linux.
        2. Fix USB3.0 malfunction.
           Root Cause:  USB OC[0] is removed in EVT3. Setting it as GPIO will make it malfunction.
        3. Fix power button no action in OS.
           Root cause:  Power button is work and defined as GPIO on CRB. Fix by setting it as native function.

===========================================================================
BIOS Revision:          UPC1BM0K
Build Date:             04/09/2016
Checksum:               UPC1BM0K_2GB            A1D1h
Checksum:               UPC1BM0K_IA32_2GB       6412h
Checksum:               UPC1BM0K_4GB            48AFh
Sign-on Message:
                UP-CHT01 R0.K (UPC1BM0K) (04/09/2016)
                UP-CHT01 IA32 R0.K (UPC1BM0K) (04/09/2016)
Changes:
        1. Modify SMBIOS board version -
                DVT(EVT4) - V0.4
        2. Support DVT 4GB sku.
        3. Support eDP.
        4. DVT(EVT4) GPIO programming - 
                (1) Set all GPIO, which are connected to CPLD for unknown usage, as GPI
                (2) Remove "I2S/GPIO" control on HAT
                (3) Remove pin 12, 35, 36, 37, 38, 40 control from HAT configuration.

===========================================================================
BIOS Revision:          UPC1BM0I
Build Date:             03/29/2016
Checksum:               UPC1BM0I_2GB 4AAFh
Checksum:               UPC1BM0I_2GB_IA32 C715h
Checksum:               UPC1BM0I_4GB 49D7h
Sign-on Message:
                UP-CHT01 R0.I (UPC1BM0I) (03/29/2016)
                UP-CHT01 IA32 R0.I (UPC1BM0I) (03/29/2016)
Changes:
        1. Modify BIOS setup -
                (1) Default disable HSIC and SSIC ports that are not used.
                (2) Disable and hide engineering mode.
        2. Modify SMBIOS board version for customer's requirement. -
                EVT1 - V0.1
                EVT2 - V0.2
                EVT3 - V0.3
                EVT4 - V0.4
        3. Modify HAT for EVT3 specification change -
                SDIO GPIO programming.
                Show SDIO item and hide SD card item
                Set UART2 default disabled and hidden
                Set SPI2 CS1 default as GPO, high, and make it selectable even when SPI2 is enabled.
        4. Fix I2C1(I2C#2) malfunction
           Root Cause:  Bad coding when changing GPIO mapping.

===========================================================================
BIOS Revision:          UPC1BM0G
Build Date:             02/25/2016
Checksum:               UPC1BM0F_2G C395h
Checksum:               UPC1BM0F_4G CFADh
Sign-on Message:
                UP-CHT01 R0.G (UPC1BM0G) (02/25/2016)
Changes:
        1. Build for EVT3 2GB/4GB board.
        2. Change setup item default value.
          (1) Enable all SSIC and HSIC in BIOS
          (2) Disable DPTF
          (3) Enable CPU Turbo


===========================================================================
BIOS Revision:          UPC1BM0F
Build Date:             02/19/2016
Checksum:               UPC1BM0F_2G E168h
Checksum:               UPC1BM0F_4G 4C3Ch
Sign-on Message:
                UP-CHT01 R0.F (UPC1BM0F) (02/19/2016)
Changes:
        1. Build for EVT3 2GB/4GB board.

===========================================================================
BIOS Revision:          UPC1AM0F
Build Date:             02/06/2016
Checksum:               UPC1AM0F        8357h
Checksum:               UPC1AM0F_IA32   7277h
Sign-on Message:
                UP-CHT01 R0.F (UPC1AM0F) (02/06/2016)
                UP-CHT01 IA32 R0.F (UPC1AM0F)(02/06/2016)
Changes:
        1. Build for EVT2 2GB board.

===========================================================================
BIOS Revision:          UPC1AM0E
Build Date:             02/03/2016
Checksum:               UPC1AM0E        6AE1h
Checksum:               UPC1AM0E_IA32   DEF8h
Sign-on Message:
                UP-CHT01 R0.E (UPC1AM0E) (02/03/2016)
                UP-CHT01 IA32 R0.E (UPC1AM0E)(02/03/2016)
Changes:
        1. Support OTG -
                (1) Remove CRB garbage code about OTG feature.
                (2) Show USB mode selection items
                    Also Add a "Auto" item for validating USB_ID signal.
                (3) Show "USB OTG Support" and set default from "AUTO" to "ACPI",
                    otherwise OTG will be disabled in Windows/Linux.
        2. Fine-tune for MIPI interface.

===========================================================================
BIOS Revision:          UPC1AM0D
Build Date:             01/25/2016
Checksum:               UPC1AM0D        0F89h
Checksum:               UPC1AM0D_IA32   BE3Eh
Sign-on Message:
                UP-CHT01 R0.D (UPC1AM0D) (01/25/2016)
                UP-CHT01 IA32 R0.D (UPC1AM0D)(01/25/2016)
Changes:
        1. Correct COM1(UART0) default.
        2. Correct I2C speed for I2C2.
           Root Cause:  Coding mistake.

Known issue:    COM1 can send data but cannot recieve data.

===========================================================================
BIOS Revision:          UPC1AM0C
Build Date:             01/22/2016
Checksum:               UPC1AM0C        28BDh
                        UPC1AM0C IA32   931Dh
Sign-on Message:
                UP-CHT01 R0.C (UPC1AM0C) (01/22/2016)
                UP-CHT01 IA32 R0.C (UPC1AM0C)(01/22/2016)
Changes:
        1. Correct I2C speed.
           Root Cause:  Coding mistake.
        2. Show COM1(UART0) for validation COM port interface on CN7.

===========================================================================
BIOS Revision:          UPC1AM0B
Build Date:             01/19/2016
Checksum:               2E53h
Sign-on Message:
                UP-CHT01 R0.B (UPC1AM0B) (01/19/2016)
Changes:
        1. Fix windows installation fail. Windows shows BSOD when finishing installation. (after file copy)
           This does not observed for a windows which was already been installed with older BIOS.
           Root Cause:  I2C library was configured as 100KHz in BIOS R0.A. This may cause 
                onboard I2C slave devices to be falsely configured (PMIC for example)

===========================================================================
BIOS Revision:          UPC1AM0A
Build Date:             01/15/2016
Checksum:               1D5Ah
Sign-on Message:
                UP-CHT01 R0.A (UPC1AM0A) (01/15/2016)
Changes:
        1. Support selecting I2C speed in BIOS.
        2. Update CPU microcode.
        3. Support EVT2(H/W A0.2) new HAT design -
           (1) GPIO programming for H/W A0.2,
           (2) Support controlling PCA9555
        Note:   All Native/GPIO items are replaced with LPSS items to simplify HAT 
           control, besides I2C0/GPIO item and I2S/GPIO item.

Known Issue:
        When I2C0/GPIO set to I2C0,
        unexpected key stroke will continuos occure in POST/UEFI environment.

===========================================================================
BIOS Revision:          UPC1AM09
Build Date:             01/11/2016
Checksum:               781Bh
Sign-on Message:
                UP-CHT01 R0.9 (UPC1AM09) (01/11/2016)
Changes:
        1. Modiy "Version" data in SMBIOS Type 2.
           For SW App. to differentiate board version.
                EVT1 - V0.1
        2. Fix system does not boot if disabling I2C#2 in BIOS setup.
           Root Cause:  Removing garbage code which is for CRB.

===========================================================================
BIOS Revision:          UPC1AM08
Build Date:             12/24/2015
Checksum:               EB92h
Sign-on Message:
                UP-CHT01 R0.8 (UPC1AM08) (12/24/2015)
Changes:
        1. Modify ACPI ID for PWM2, to be same as PWM1
        2. Change logo with file provided by customer.
        3. Support MIPI during POST.

===========================================================================
BIOS Revision:          UPC1AM07
Build Date:             12/17/2015
Checksum:               E1E4h
Sign-on Message:
                UP-CHT01 R0.7 (UPC1AM07) (12/17/2015)
Changes:
        1. Support Auto-load-default when RTC battery is detected as low.
        2. Support MIPI panel. Add a item for selecting panel type.
        3. Add /L in go_64.nsh, for updating LOGO correctly.

===========================================================================
BIOS Revision:          UPC1AM06
Build Date:             12/04/2015
Checksum:               37FCh
Sign-on Message:
                UP-CHT01 R0.6 (UPC1AM06) (12/04/2015)
Changes:
        1. Remove garbadge codes which are for CRB design.
                (1) Do not override DMI board name according to BOARD ID
                (2) Remove garbage ASL code, especially related to GPIO.
                (3) Remove OTG2 ASL device which take GPIO_N3 as USB_ID
        2. Change logo with file provided by customer.
        3. Correct GPIO porting for HAT SPI, UART1, UART2
        4. Force enable PWM and HDA devices for validation.

===========================================================================
BIOS Revision:          UPC1AM05
Build Date:             11/26/2015
Checksum:               DEF2h
Sign-on Message:
                UP-CHT01 R0.5 (UPC1AM05) (11/26/2015)
Changes:
        1. Modify setup default -
                (1) Default disable LPC COM1(PCU UART0) because it's not designed on UP.
                (2) Default enable PWM0, PWM1
        2. Support PWM0, PWM1 in Windows. Remove dependency to OS Image ID.
        3. Remove garbadge codes which are for CRB design.
                (1) Fix HAT pin15 GPIO control.

===========================================================================
BIOS Revision:          UPC1AM04
Build Date:             11/24/2015
Checksum:               9A0Eh
Sign-on Message:
                UP-CHT01 R0.4 (UPC1AM04) (11/24/2015)
Changes:
        1. Support HAT input mode
        2. Modify setup - Add "OS IMAGE ID" item in Boot page
           Refer to Note#2 for detail.
        3. Patch for system no boot when set I2C1 as GPIO. This happens only in R0.3.
           Reason: When setting LPSS I2C #2 Support 'Disabled',
                   system will not boot for unknown reason.
        4. Seperating HAT configuration items from "LPSS" items to ease debug
        5. Remove garbage devices in device manager.
        6. Remove garbadge codes which are for CRB design.
                (1) Fix HAT pin7, pin18, pin29 GPIO control.
                (2) Does not need additional power button event for boot.
                Root cause: BIOS shuts system For Win8 Charging spec(considering battery insertion).
                But it is not necessary for UP-CH01.
Known issue:
        1. HAT Pin15 is remained low, investigating.

===========================================================================
BIOS Revision:          UPC1AM03
Build Date:             11/17/2015
Checksum:               5F98h
Sign-on Message:
                UP-CHT01 R0.3 (UPC1AM03) (11/17/2015)
---------------------------------------------------------------------------
BIOS Revision:          UPC1AM03_IA32
Build Date:             11/17/2015
Checksum:               51E0h
Sign-on Message:
                UP-CHT01 IA32 R0.3 (UPC1AM03) (11/17/2015)
---------------------------------------------------------------------------
Changes:
        1. Modify setup menu - Re-arrange whole setup menu
        2. Remove garbage devices in device manager.
        3. Remove POST debug message.
        4. Fix no graphics device found in windows.
           This causes low 3D performance.

===========================================================================
BIOS Revision:          UPC1AM02
Build Date:             11/12/2015
Checksum:               5C76h
Sign-on Message:
                UP-CHT01 R0.2 (UPC1AM02) (11/12/2015)
---------------------------------------------------------------------------
BIOS Revision:          UPC1AM02_IA32
Build Date:             11/12/2015
Checksum:               AE40h
Sign-on Message:
                UP-CHT01 IA32 R0.2 (UPC1AM02) (11/12/2015)
---------------------------------------------------------------------------
Changes:
        1. Modify SPI "Fast Read" speed from 20MHz to 50MHz
        2. Modify setup - PCIe S0ix : "Enabled" to "Disabled"
        3. Modify VBIOS(GOP) for UP-CHT01
                (1) Default disable eDP
                (2) Add MIPI en/disable item, default disabled.
                    (But MIPI still underworking)
        4. Support selecting GPIO mutiple function in setup menu.

===========================================================================
BIOS Revision:          UPC1AM01 (UPC1AM01_TEMP3)
Build Date:             11/07/2015
Sign-on Message:
                N/A
Changes:
        1. GPIO Programming.

===========================================================================
BIOS Revision:          UPC1AM00        (Based on CRB 1ARXP050_T3)
Build Date:             11/02/2015
Checksum:               2002h
Sign-on Message:
                N/A
Changes:
        1. For bring-up.

===========================================================================
